VLSI Digital System Design
Course Overview
In this course we will cover the fundamental topics necessary to successfully engineer modern VLSI designs. This requires that we investigate two overlapping areas of study. The first gives students an introduction to fabrication technologies and device physics. This involves learning how modern integrated circuits are manufactured and about their electrical properties. Then we will cover the principles of layout and how to simulate and verify small circuits. In addition, we will present a variety of trade-offs in full-custom design such as circuit style. The course will be project oriented and will be one of the most relevent and practical courses for anyone interested in hardware design.Web Page
The course web page is at http://www.soe.ucsc.edu/classes/cmpe222/Winter11Topic | Slides | Reading | ||
---|---|---|---|---|
Introduction | Chapter 1 | |||
Fabrication | Chapter 2 (pp. 35-46) | |||
Design Rules and Layout | Chapter 2 (pp 47-64) | |||
Devices | Chapter 3 | |||
CMOS Introduction | Chapter 5 (pp 179-192) | |||
CMOS Layout & TX Sizing | Chapter 5 (pp. 193-227) | |||
Interconnect | Chapter 4 (pp. 135-159) | |||
Low-Power Design | Chapter 5 (pp. 211-229), 11.7-11.8 | |||
Review (bring questions) | ||||
MIDTERM EXAM (one 8.5x11 sheet of notes allowed) | ||||
CMOS Gate Sizing | Chapter 6 (pp. 235-263), Logical Effort paper | |||
Exam Solutions | ||||
Other Logic Styles | Chapter 6 (pp 264-306) | |||
Sequential Circuits | Chapter 7 (pp. 325-350) | |||
Memories (RAM, ROM, EEPROM) | Chapter 12 (pp. 623-689, pp. 701-707) | |||
Clocks | Chapter 10 (pp 491-549) | |||
Clocks (pt II) | ||||
Reliability, System Integration | None | |||
DFM | None | |||
Design Reviews! No class. | ||||
FINAL EXAM (scheduled 4pm-7pm in Crown 201) |
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