Instructor: Saraju P. Mohanty
Textbook: Low-Power High-Level Synthesis for Nanoscale CMOS Circuits, S. P. Mohanty, N. Ranganathan, E. Kougianos, and P. Patra
Download slides from here
| AVS9_PLL-Design.pdf |
| AVS8_Gate-Leakage.pdf |
| AVS7_SPICE.pdf |
| AVS6_Margin-Reliability-Scaling.pdf |
| AVS5_Nano-CMOS_HLS.pdf |
| AVS4_Power.pdf |
| AVS3_GPP_design.pdf |
| AVS2_HLS.pdf |
| AVS1_Overview.pdf |
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